AN 796: Cyclone® V and Arria® V SoC Device Design Guidelines

ID 683360
Date 3/30/2022
Document Table of Contents

3.1.2. Determining your SoC FPGA Topology

To determine which system topology best suits your application, you must first determine how to partition your application into hardware and software.

GUIDELINE: Profile your software to identify functions for hardware acceleration.

Use any good profiling tool (such as DS-5 streamline profiler) to identify functions that are good candidates for hardware acceleration, and isolate functions that are best implemented in software.