AN 796: Cyclone® V and Arria® V SoC Device Design Guidelines

ID 683360
Date 3/30/2022
Document Table of Contents Select Software Debug Tools

GUIDELINE: Select software debug tools.

Arm* DS-5* Intel® SoC FPGA Edition includes a fully featured Eclipse-based debugging environment. There are also other debugging tools offerings from third party providers such as Lauterbach T32.

The debug tools require a JTAG connection to the SoC FPGA device. The connection could be achieved in a couple of ways:
  • An embedded USB-Blaster II chip could be available on-board such as on the Cyclone® V SoC / Arria® V SoC Development Kit.
  • External JTAG hardware may be required when using the Lauterbach T32 tools.