Intel® Hyperflex™ Architecture High-Performance Design Handbook

ID 683353
Date 10/04/2021
Document Table of Contents

7.1.4. Pin Assignments

Black-boxing logic can be the cause of some pin assignment errors. Use the following guidelines to resolve pin assignments. Reassign high-speed communication input pins to correct such errors.

The FPGA checks for the status of high-speed pins and generates some errors if you do not connect these pins. When you black-box transceivers, you may encounter this situation. To address these errors, re-assign the HSSI pins to a standard I/O pin. Verify and change the I/O bank if necessary.

In the .qsf file, the assignment translates to the following:

set_instance_assignment –name IO_STANDARD “2.5 V” –to hip_serial_rx_in1
set_instance_assignment –name IO_STANDARD “2.5 V” –to hip_serial_rx_in2
set_instance_assignment –name IO_STANDARD “2.5 V” –to hip_serial_rx_in3
set_location_assignment IOBANK_4A –to hip_serial_rx_in1
set_location_assignment IOBANK_4A –to hip_serial_rx_in2
set_location_assignment IOBANK_4A –to hip_serial_rx_in3

Dangling pins

If you have high-speed I/O pins dangling because of black-boxing components, set them to virtual pins. Enter this assignment in the Assignment Editor, or in the .qsf file directly, as shown below:

set_instance_assignment –name VIRTUAL_PIN ON –to hip_serial_tx_in1
set_instance_assignment –name VIRTUAL_PIN ON –to hip_serial_tx_in2
set_instance_assignment –name VIRTUAL_PIN ON –to hip_serial_tx_in3

GPIO pins

If you have GPIO pins, make them virtual pins using this qsf assignment:

set_instance_assignment VIRTUAL_PIN –to *

Did you find the information on this page useful?

Characters remaining:

Feedback Message