Intel® Hyperflex™ Architecture High-Performance Design Handbook

ID 683353
Date 10/04/2021
Public
Document Table of Contents

2.4.2.1.2. Viewing Clock Networks in the Fitter Report

The Compilation Report provides detailed information about clock network implementation following Fitter placement. View the Global & Other Fast Signals Details report to display the length and depth of the clock path from the source clock pin to the clock tree.

To view clock network implementation in Fitter reports:

  1. Open a project.
  2. On the Compilation Dashboard, click Fitter, Place, Route to run the Fitter.
  3. On the Compilation Dashboard, click the Report icon for the completed stage.
  4. Click Global & Other Fast Signals Details. The table displays the length of the clock route from source to the clock tree, and the clock region depth.
    Figure 61. Clock Network Details in Fitter Report

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