Intel® Hyperflex™ Architecture High-Performance Design Handbook

ID 683353
Date 10/04/2021

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Document Table of Contents Overconstraints

Overconstraints direct the Fitter to spend more time optimizing specific parts of a design. Overconstraints are appropriate in some situations to improve performance. However, because legacy overconstraint methods restrict retiming optimization, Intel® Hyperflex™ architecture FPGAs support a new is_post_route function that allows retiming. The is_post_route function allows the Fitter to adjust slack delays for timing optimization.

Overconstraints Syntax (Allows Hyper-Retiming)

if { ! [is_post_route] } {
     # Put overconstraints here

Legacy Overconstraints Example (Prevents Hyper-Retiming)

### Over Constraint ###
# if {$::quartus(nameofexecutable) == "quartus_fit"} {
#     set_min_delay 0.050 -from [get_clocks {CPRI|PHY|TRX*|*|rx_pma_clk}] -to \
     [get_clocks {CPRI|PHY|TRX*|*|rx_clkout}]
# }