Intel® Hyperflex™ Architecture High-Performance Design Handbook

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ID 683353
Date 10/04/2021
Public
Document Table of Contents

7. Intel® Hyperflex™ Architecture Porting Guidelines

This chapter provides guidelines for migrating a Stratix® V or an Intel® Arria® 10 design to an Intel® Hyperflex™ architecture FPGA. These guidelines allow you to quickly evaluate the benefits of design optimization in the Intel® Hyperflex™ architecture, while still preserving your design’s functional intent.

Porting requires minor modifications to the design, but can achieve major performance gains for your design’s most critical modules.

To experiment with performance exploration, select for migration a large, second-level module that does not contain periphery IP (transceiver, memory, etc.). During performance exploration, review reported performance improvements.

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