Intel® Agilex™ Clocking and PLL User Guide

ID 683761
Date 3/26/2022
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2.2.6.1. Direct Compensation Mode

In direct mode, the PLL does not compensate for any clock network delays. This mode provides better jitter performance compared to other compensation modes because the clock feedback into the phase frequency detector (PFD) passes through less circuitry. Both the PLL internal- and external-clock outputs are phase-shifted with respect to the PLL clock input.

Figure 11. Example of Phase Relationship Between the PLL Clocks in Direct Mode

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