Intel® Agilex™ Clocking and PLL User Guide

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ID 683761
Date 3/26/2022
Public
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5.4.4. IOPLL IP Core Parameters - Dynamic Reconfiguration Tab

Table 11.   IOPLL IP Core Parameters - Dynamic Reconfiguration Tab for Intel® Agilex™ Devices
Parameter Value Description
Enable dynamic reconfiguration of PLL On or Off Turn on to enable the dynamic reconfiguration of this PLL (in conjunction with the IOPLL Reconfig Intel® FPGA IP core).
Enable access to dynamic phase shift ports On or Off Turn on to enable the dynamic phase shift interface with the PLL.
MIF Generation Option 13 Generate New MIF File, Add Configuration to Existing MIF File, or Create MIF File during IP Generation

Either create a new .mif file containing the current configuration of the I/O PLL by clicking Create MIF File or add this configuration to an existing .mif file by clicking Append to MIF File. A .mif file also can be opted to be generated during IP generation.

The generated .mif file contains current PLL profile and a collection of physical parameters—such as M, N, C, K, bandwidth, and charge pump—that defines that PLL. You can use this .mif file during dynamic reconfiguration to reconfigure the I/O PLL to its current settings.

Path to New/Existing MIF file 13 Enter location and file name of the new .mif file to be created or existing .mif file to be appended.
Name of Current Configuration 13

Enter the file name of the existing .mif file you intend to add to.

13 This parameter is only available when Enable dynamic reconfiguration of PLL is turned on.

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