Intel® Agilex™ Clocking and PLL User Guide

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ID 683761
Date 3/26/2022
Public
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6.5.3. Data Bus Setting for Dynamic Phase Shift for IOPLL Reconfig IP Core

Table 27.  Data Bus Setting for Dynamic Phase Shift for IOPLL Reconfig IP Core
Write Data Bus Setting Description
data[2:0] Determines the number of phase shifts per dynamic phase shift operation. Up to seven phase shifts per operation are possible. Each phase shift step is equal to 1/8 of I/O PLL VCO period.
data[3] Determines the direction of dynamic phase shift. When data[3] = 0, phase shift is in negative direction. When data[3] = 1, phase shift is in positive direction.
data[7:4]
Determines the counter to be selected to perform dynamic phase shift operation.
Counter Name data[7:4]
C1 4’b0001
C2 4’b0010
C3 4’b0011
C4 4’b0100
C5 4’b0101
C6 4’b0110
C7 4’b0111
All C counters 4’b1111

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