Intel® Agilex™ Clocking and PLL User Guide

ID 683761
Date 3/26/2022
Document Table of Contents Normal Compensation Mode

An internal clock in normal compensation mode is phase-aligned to the input clock pin. The external clock output pin has a phase delay relative to the clock input pin if connected in this mode. The Intel® Quartus® Prime Timing Analyzer reports any phase difference between the two. In normal compensation mode, the delay introduced by the clock network is fully compensated. Only one output clock can be compensated in normal compensation mode.

Figure 14. Example of Phase Relationship Between the PLL Clocks in Normal Compensation Mode

Did you find the information on this page useful?

Characters remaining:

Feedback Message