Intel® Agilex™ Clocking and PLL User Guide

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ID 683761
Date 3/26/2022
Public
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6.3.4. Dynamic Phase Shift Reconfiguration

The dynamic phase shifts reconfiguration can determine the number of shifts, the direction of the phase shift and the output clock to be shifted.

To perform dynamic phase shift reconfiguration through the IOPLL Reconfig IP core, follow these steps:

  1. Set mgmt_address[9:8] to 2’b11 to select dynamic phase shift reconfiguration mode.
  2. set mgmt_writedata[7:0] to indicate the desired number of phase shift, the direction of phase shift, and the desired counter to be shifted.
  3. To start the dynamic phase shift reconfiguration on the I/O PLL, assert the mgmt_write signal for one mgmt_clk cycle. This signal is the equivalent of the phase_en signal on the I/O PLL.
  4. After the dynamic phase shift is complete, the mgmt_waitrequest signal is de-asserted.

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