Intel® Agilex™ F-Series and I-Series LVDS SERDES User Guide

ID 721819
Date 11/30/2022

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5. Intel® Agilex™ High-Speed LVDS I/O Implementation Guide

You can implement your high-speed LVDS I/O design using the LVDS SERDES Intel® FPGA IP in the Intel® Quartus® Prime software. The software contains tools for you to create and compile your design, and configure your device.

The Intel® Quartus® Prime software allows you to prepare for device migration, set pin assignments, define placement restrictions, setup timing constraints, and customize the LVDS SERDES IP.