Intel® Agilex™ F-Series and I-Series LVDS SERDES User Guide

ID 721819
Date 11/30/2022
Document Table of Contents

6. Intel® Agilex™ LVDS SERDES Timing

The true differential I/O standard enables high-speed transmission of data, resulting in better overall system performance. To take advantage of fast system performance, you must analyze the timing for these high-speed signals. Timing analysis for the differential block is different from traditional synchronous timing analysis techniques.

Did you find the information on this page useful?

Characters remaining:

Feedback Message