Intel® Agilex™ F-Series and I-Series LVDS SERDES User Guide

ID 721819
Date 11/30/2022
Public
Document Table of Contents

10. Documentation Related to the Intel® Agilex™ F-Series and I-Series LVDS SERDES User Guide

Table 38.  LVDS SERDES ReferencesThe links in this table are references related to the Intel® Agilex™ F-Series and I-Series LVDS SERDES system.
Reference Description
Intel® Agilex™ Device Data Sheet

Lists the electrical characteristics, switching characteristics, configuration specifications, and timing for Intel® Agilex™ devices.

Intel® Agilex™ Device Family Pin Connection Guidelines

Provides guidelines for all pins in Intel® Agilex™ devices.

Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

Describes features, functional descriptions, implementation guidelines, and restrictions on general-purpose I/O system in Intel® Agilex™ F-series and I-series devices.

Intel® Agilex™ Clocking and PLL User Guide

Describes the Intel® Agilex™ clock and PLL specifications and guidelines.

Intel® Agilex™ Configuration User Guide

Describes the Intel® Agilex™ configuration specifications and guidelines.

Intel® Agilex™ Power Management User Guide Describes the Intel® Agilex™ power management specifications and guidelines.
IBIS Models for Intel FPGA Devices

Provides IBIS models for Intel® Agilex™ devices.

AN 433: Constraining and Analyzing Source-Synchronous Interfaces Describes techniques for constraining and analyzing source-synchronous interfaces.
LVDS SERDES Intel® FPGA IP Release Notes Lists the changes made in each release of the LVDS SERDES Intel® FPGA IP.

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