6.2.2. Receiver Skew Margin
- In the non-DPA mode, use RSKM, TCCS, and sampling window (SW) specifications for high-speed source-synchronous differential signals in the receiver data path.
- In the DPA and Soft-CDR modes, use DPA jitter tolerance instead of the receiver skew margin (RSKM).
|RSKM||The timing margin between the clock input of the receiver and the data input sampling window, and the jitter induced from core noise and I/O switching noise.|
|Time unit interval (TUI)||The time period of the serial data.|
|SW||The period of time that the input data must be stable to ensure that the LVDS receiver samples the data successfully. The SW is a device property and varies according to device speed grade.|
|TCCS||The timing difference between the fastest and the slowest output edges across channels driven by the same PLL. The TCCS measurement includes the tCO variation, clock, and clock skew.|
You must calculate the RSKM value, based on the data rate and device, to determine if the LVDS SERDES receiver can sample the data:
- A positive RSKM value, after deducting transmitter jitter, indicates that the LVDS SERDES receiver can sample the data properly.
- A negative RSKM value, after deducting transmitter jitter, indicates that the LVDS SERDES receiver cannot sample the data properly.
RSKM Calculation Example
This example shows the RSKM calculation for Intel® Agilex™ devices at 1 Gbps data rate with a 200 ps board channel-to-channel skew.
The non-DPA receiver works correctly if the RSKM is greater than 0 ps after deducting transmitter jitter.
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