4.2.4. Word Boundaries Alignment
Aligning with Control Characters
By adding control characters in the data stream, your logic can search for a known pattern to align the word boundaries. You can compare the received data for each channel, and then pulse the rx_bitslip_ctrl signal as required until you receive the control character.
Aligning without Control Characters
Without control characters in the data stream, you need a deterministic relationship between the reference clock and the data. With the deterministic relationship, you can predict the word boundary using timing simulation or laboratory measurement. You can only use deterministic relationship in non-DPA mode.
The only way to ensure a deterministic relationship on the default word position in the SERDES when the device powers up, or anytime the PLL is reset, is to have a reference clock equal to the data rate divided by the deserialization factor. This is important because the PLL locks to the rising edge of the reference clock. If you have one rising edge on the reference clock per serial word received, the deserializer always starts at the same position.
For example, if the data rate is 800 Mbps and the deserialization factor is 8, the PLL requires a 100 MHz reference clock.
Using timing simulation, or lab measurements, monitor the parallel words received and determine how many pulses of the rx_bitslip_ctrl you require to set your word boundaries. You can create a simple state machine to apply the required number of pulses after you enter user mode or at any time after you reset the PLL.
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