Intel® Stratix® 10 High-Speed LVDS I/O User Guide

ID 683792
Date 3/28/2022
Public
Document Table of Contents

3.2.2.1. Differential Bit Naming Conventions

Table 14.  Differential Bit NamingThis table lists the conventions for differential bit naming for 18 differential channels. The MSB and LSB positions increase with the number of channels used in a system.
Receiver Channel Data Number Internal 8-Bit Parallel Data
MSB Position LSB Position
1 7 0
2 15 8
3 23 16
4 31 24
5 39 32
6 47 40
7 55 48
8 63 56
9 71 64
10 79 72
11 87 80
12 95 88
13 103 96
14 111 104
15 119 112
16 127 120
17 135 128
18 143 136

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