Intel® Stratix® 10 High-Speed LVDS I/O User Guide

ID 683792
Date 11/30/2022
Document Table of Contents

5. LVDS SERDES Intel® FPGA IP References

You can set various parameter settings for the LVDS SERDES IP core to customize its behaviors, ports, and signals.

The Intel® Quartus® Prime software generates your customized LVDS SERDES IP core according to the parameter options that you set in the parameter editor.

Did you find the information on this page useful?

Characters remaining:

Feedback Message