Intel® Stratix® 10 High-Speed LVDS I/O User Guide

ID 683792
Date 11/30/2022
Document Table of Contents

3.2.3. Transmitter Channel-to-Channel Skew

The receiver skew margin calculation uses the transmitter channel-to-channel skew (TCCS)—an important parameter based on the Intel® Stratix® 10 transmitter in a source-synchronous differential interface:

  • TCCS is the difference between the fastest and slowest data output transitions, including the TCO variation and clock skew.
  • For LVDS transmitters, the Timing Analyzer provides the TCCS value in the TCCS report (report_TCCS) in the Intel® Quartus® Prime compilation report. The TCCS report lists the TCCS values for serial output ports.
  • You can also get the TCCS value from the device datasheet.

Perform PCB trace compensation to adjust the trace length of each LVDS channel to improve channel-to-channel skew when interfacing with non-DPA receivers at data rate above 840 Mbps.

The Intel® Quartus® Prime Fitter report lists the amount of delay you must add to each trace.

The LVDS Transmitter/Receiver Package Skew Compensation report lists the recommended trace delay numbers. Using these numbers, you can manually compensate the skew on the PCB board trace to reduce the channel-to-channel skew and meet the timing budget between the LVDS channels.