Intel® Stratix® 10 High-Speed LVDS I/O User Guide

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ID 683792
Date 3/28/2022
Public
Document Table of Contents

5.1.5. LVDS SERDES IP Core Clock Resource Summary

The Clock Resource Summary tab lists the required frequencies, phase shifts, duty cycles of the required clocks, and instructions for connections. You can refer to this tab for information about configuring and connecting an external PLL to the LVDS SERDES IP core.

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