E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/04/2021
Public

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Document Table of Contents

2.12.2.2. PHY Scratch Register

Offset: 0x301

PHY Scratch Register Fields

Bit Name Description Access Reset
31:0 scratch   RW 0x0

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