E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/04/2021
Public

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2.11.17.3.7. 100G Ethernet with Aggregated FEC

This use case is implemented in the case of multi-lane protocols like 100GbE, for example. This uses four transceiver lanes of 25 Gbps each, where all four lanes use the same FEC block. There is an inherent dependency between channels in this configuration as described in Master-Slave Configuration: Option 1 section. However, for applications like 100 GbE, dependency is acceptable and sometimes required.

Figure 66.  100G Ethernet with Aggregated FEC

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