E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/04/2021
Public

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Document Table of Contents

2.12.2.14. BER Count

Offset: 0x32A

ber_count Fields

Bit Name Description Access Reset
31:0 count BER Count
  • 32b count that increments each time the BER_BAS_SH state is entered
  • Rolls over when maximum count is reached
  • Clears when the channel is reset
  • Can be captured using snapshot or RX shadow request
RO 0x0

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