E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/04/2021
Public

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2.12.1.14. Auto Negotiation Status Register 5

Offset: 0xCB

Auto Negotiation Status Register 5 Fields

Bit Name Description Access Reset
30:28 an_lp_adv_pause Link Partner PAUSE Ability bits

[28] = PAUSE as defined in Annex 28B

[29] = ASM_DIR as defined in Annex 28B

[30] = Reserved

RO 0x0
27 an_lp_adv_remote_fault Link Partner Remote Fault

Remote fault bit from Link Partner

RO 0x0
26:23 an_lp_adv_fec_f Link Partner FEC Ability Field

[23] = 25G RS-FEC requested

[24] = 25G BASE-R FEC (CL 74 Firecode) requested

[25] = FEC Ability

[26] = FEC Requested

RO 0x0
22:0 an_lp_adv_tech_a Link Partner Technology Ability Field

[0] = 1000BASE-KX

[1] = 10GBASE-KX4

[2] = 10GBASE-KR

[3] = 40GBASE-KR4

[4] = 40GBASE-CR4

[5] = 100GBASE-CR10

[6] = 100GBASE-KP4

[7] = 100GBASE-KR4

[8] = 100GBASE-CR4

[9] = 25GBASE-KR-S/CR-S

[10] = 25GBASE-KR/CR

[11] = 2.5GBASE-KX

[12] = 5GBASE-KR

[13] = 50GBASE-KR/CR

[14] = 100GBASE-KR2/CR2

[15] = 200GBASE-KR4/CR4

[22:16] = Reserved

RO 0x0

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