E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.12.1.4. Auto Negotiation Config Register 2

Offset: 0xC1

Auto Negotiation Config Register 2 Fields

Bit Name Description Access Reset
23:16 consortium_oui_upper Consortium Organizationally Unique Identifier (OUI) (upper 8b)

Sets the upper bits of the OUI (as defined in IEEE 802.3 Annex 73A) used in sending and receiving Next Pages.

RW 0x6A
8 an_next_page AN Next Page

1: New user Next Page data to send is loaded in 0xC5-0xC6 and finished reading LP next page data from 0xC9-0xCA. Only available if 0xC0[2] is set to 1.

If there are no more Next Pages to send, but you still wishes to read LP Next Pages, you must set 0xC5-0xC6 to the IEEE null message as defined in 73A.1 (bit D0=1, all other bits=0) before setting this bit.

To determine if the LP has more Next Pages to send, view the NP bit (D15) of the LP base page or previous LP Next Page.

After the IP has sent the user Next Page data and loaded the new LP Next Page data to 0xC9-0xCA (if available), this bit will self-clear (0 = LP next page data ready to read)

RW 0x0
0 reset_an Reset all AN state machines

1: Reset all the AN state machines

0: Normal operation

Maps to state variable mr_main_reset in IEEE 802.3 CL 73.10.1.

This bit is self-cleared when auto-negotiation restarts.

RW 0x0

Did you find the information on this page useful?

Characters remaining:

Feedback Message