E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 8/04/2021
Public

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Document Table of Contents

2.12.2.52. Deskew Depth 1

Offset: 0x380

Deskew Depth 1 Fields

Bit Name Description Access Reset
29:24 depth4 Deskew depth for one of the PCS Virtual lanes RO 0x0
23:18 depth3 Deskew depth for one of the PCS Virtual lanes RO 0x0
17:12 depth2 Deskew depth for one of the PCS Virtual lanes RO 0x0
11:6 depth1 Deskew depth for one of the PCS Virtual lanes RO 0x0
5:0 depth0 Deskew depth for one of the PCS Virtual lanes RO 0x0

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