Intel® Quartus® Prime Standard Edition User Guide: Platform Designer

ID 683364
Date 12/15/2018
Public
Document Table of Contents

3.14.9. Avalon® Streaming Interface Signal Roles

Each signal in an Avalon® -ST source or sink interface corresponds to one Avalon® -ST signal role. An Avalon® -ST interface may contain only one instance of each signal role. All Avalon® -ST signal roles apply to both sources and sinks and have the same meaning for both.
Table 76.   Avalon® -ST Interface SignalsIn the following table, all signal roles are active high.
Signal Role Width Direction Required Description
Fundamental Signals
channel 1 – 128 Source → Sink No The channel number for data being transferred on the current cycle.

If an interface supports the channel signal, the interface must also define the maxChannel parameter.

data 1 – 4,096 Source → Sink No The data signal from the source to the sink, typically carries the bulk of the information being transferred.

Parameters further define the contents and format of the data signal.

error 1 – 256 Source → Sink No A bit mask to mark errors affecting the data being transferred in the current cycle. A single bit of the error signal masks each of the errors the component recognizes. The errorDescriptor defines the error signal properties.
ready 1 Sink → Source No Asserts high to indicate that the sink can accept data. ready is asserted by the sink on cycle <n> to mark cycle <n + readyLatency > as a ready cycle. The source may only assert valid and transfer data during ready cycles.

Sources without a ready input do not support backpressure. Sinks without a ready output never need to backpressure.

valid 1 Source → Sink No The source asserts this signal to qualify all other source to sink signals. The sink samples data and other source-to-sink signals on ready cycles where valid is asserted. All other cycles are ignored.

Sources without a valid output implicitly provide valid data on every cycle that a sink is not asserting backpressure. Sinks without a valid input expect valid data on every cycle that they are not backpressuring.

Packet Transfer Signals
empty 1 – 5 Source → Sink No Indicates the number of symbols that are empty, that is, do not represent valid data. The empty signal is not necessary on interfaces where there is one symbol per beat.
endofpacket 1 Source → Sink No Asserted by the source to mark the end of a packet.
startofpacket 1 Source → Sink No Asserted by the source to mark the beginning of a packet.