Intel® Quartus® Prime Standard Edition User Guide: Platform Designer

ID 683364
Date 12/15/2018
Public
Document Table of Contents

3.9.9.2. Handling Read Side Effects

Read side effects can occur when more bytes than necessary are read from the slave, and the unwanted data that are read are later inaccessible on subsequent reads. For write commands, the correct byteenable paths are asserted based on the size of the transactions. For read commands, narrow-sized bursts are broken up into multiple non-bursting commands, and each command with the correct byteenable paths asserted.
Platform Designer always assumes that the byteenable is asserted based on the size of the command, not the address of the command. The following scenarios are examples:
  • For a 32-bit AXI master that issues a read command with an unaligned address starting at address 0x01, and a burstcount of 2 to a 32-bit Avalon® slave, the starting address is: 0x00.
  • For a 32-bit AXI master that issues a read command with an unaligned address starting at address 0x01, with 4-bytes to an 8-bit AXI slave, the starting address is: 0x00.