Intel® Quartus® Prime Standard Edition User Guide: Platform Designer

ID 683364
Date 12/15/2018
Public
Document Table of Contents

4.11.2. FIFO Operating Modes

  • Default mode—The core accepts incoming data on the in interface ( Avalon® -ST data sink) and forwards it to the out interface ( Avalon® -ST data source). The core asserts the valid signal on the Avalon® -ST source interface to indicate that data is available at the interface.
  • Store and forward mode—This mode applies only to the single-clock FIFO core. The core asserts the valid signal on the out interface only when a full packet of data is available at the interface. In this mode, you can also enable the drop-on-error feature by setting the drop_on_error register to 1. When this feature is enabled, the core drops all packets received with the in_error signal asserted.
  • Cut-through mode—This mode applies only to the single-clock FIFO core. The core asserts the valid signal on the out interface to indicate that data is available for consumption when the number of entries specified in the cut_through_threshold register are available in the FIFO buffer.
Note: To turn on Cut-through mode, the Use store and forward parameter must be set to 0. Turning on Use store and forward mode prompts the user to turn on Use fill level, and then the CSR appears.