Intel® Quartus® Prime Standard Edition User Guide: Platform Designer

ID 683364
Date 12/15/2018
Public
Document Table of Contents

5.18. Creating Platform Designer Components Revision History

The following revision history applies to this chapter:

Document Version Intel® Quartus® Prime Version Changes
2018.09.24 18.1.0 Initial release in Intel Quartus Prime Standard Edition User Guide.
2018.05.07 18.0
  • Added scripting support for wire-level expressions.
2017.11.06 17.1.0
  • Changed instances of Qsys to Platform Designer (Standard)
  • Replaced mentions of altera_axi_default_slave to altera_error_response_slave
2017.05.08 17.0.0
  • Updated Figure: Address Span Extender
2015.11.02 15.1.0 Changed instances of Quartus II to Quartus Prime.
2015.05.04 15.0.0
  • Updated screen shots Files tab, Qsys Component Editor.
  • Added topic: Specify Interfaces and Signals in the Qsys Component Editor.
  • Added topic: Create an HDL File in the Qsys Component Editor.
  • Added topic: Create an HDL File Using a Template in the Qsys Component Editor.
November 2013 13.1.0
  • add_hdl_instance
  • Added Creating a Component With Differing Structural Qsys View and Generated Output Files.
May 2013 13.0.0
  • Consolidated content from other Qsys chapters.
  • Added Upgrading IP Components to the Latest Version.
  • Updated for AMBA APB support.
November 2012 12.1.0
  • Added AMBA AXI4 support.
  • Added the demo_axi_memory example with screen shots and example _hw.tcl code.
June 2012 12.0.0
  • Added new tab structure for the Component Editor.
  • Added AXI 3 support.
November 2011 11.1.0 Template update.
May 2011 11.0.0
  • Removed beta status.
  • Added Avalon Tri-state Conduit (Avalon‑TC) interface type.
  • Added many interface templates for Nios custom instructions and Avalon‑TC interfaces.
December 2010 10.1.0 Initial release.