Intel® Quartus® Prime Standard Edition User Guide: Platform Designer

ID 683364
Date 12/15/2018
Public
Document Table of Contents

4.1.6.2. AXI Bridge Parameters

In the parameter editor, you can customize the parameters for the AXI bridge according to the requirements of your design.

Figure 119. AXI Bridge Parameter Editor


Table 87.  AXI Bridge Parameters
Parameter Type Range Description
AXI Version string AMBA* 3 AXI or AMBA* 3 AXI Specifies the AXI version and signals that Platform Designer generates for the slave and master interfaces of the bridge.
Data Width integer 8:1024 Controls the width of the data for the master and slave interfaces.
Address Width integer 1-64 bits Controls the width of the address for the master and slave interfaces.
AWUSER Width integer 1-64 bits

Controls the width of the write address channel sideband signals of the master and slave interfaces.

ARUSER Width integer 1-64 bits

Controls the width of the read address channel sideband signals of the master and slave interfaces.

WUSER Width integer 1-64 bits

Controls the width of the write data channel sideband signals of the master and slave interfaces.

RUSER Width integer 1-16 bits

Controls the width of the read data channel sideband signals of the master and slave interfaces.

BUSER Width integer 1-16 bits

Controls the width of the write response channel sideband signals of the master and slave interfaces.