Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 8/08/2022

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2.2. Generating a Video and Vision Processing IP

To include the IP in a design, generate the IP in Platform Designer.
  1. Create a New Intel® Quartus® Prime project
  2. Open Platform Designer and create a project.
    The video and vision processing IPs are only available in Platform Designer.
  3. Select DSP > Video and Vision Processing > <IP name> Intel® FPGA IP and click Add
  4. Enter a name for your IP variant and click Create.
    The name is for both the top-level RTL module and the corresponding .ip file.
    The parameter editor for this IP appears.
  5. Choose your parameters.
  6. Click Generate HDL.
Intel® Quartus® Prime generates the RTL and the files necessary to instantiate the IP in your design and synthesize it.