Video and Vision Processing Suite Intel® FPGA IP User Guide

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ID 683329
Date 8/08/2022
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Document Table of Contents
Document Table of Contents x
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Chroma Resampler Intel® FPGA IP 11. Clipper Intel® FPGA IP 12. Clocked Video Input Intel® FPGA IP 13. Clocked Video to Full-Raster Converter Intel® FPGA IP 14. Clocked Video Output Intel® FPGA IP 15. Color Space Converter Intel® FPGA IP 16. Deinterlacer Intel® FPGA IP 17. FIR Filter Intel® FPGA IP 18. Frame Cleaner Intel® FPGA IP 19. Full-Raster to Clocked Video Converter Intel® FPGA IP 20. Full-Raster to Streaming Converter Intel® FPGA IP 21. Generic Crosspoint Intel® FPGA IP 22. Genlock Signal Router Intel® FPGA IP 23. Guard Bands Intel® FPGA IP 24. Mixer Intel® FPGA IP 25. Pixels in Parallel Converter Intel® FPGA IP 26. Scaler Intel® FPGA IP 27. Tone Mapping Operator Intel® FPGA IP 28. Test Pattern Generator Intel® FPGA IP 29. Video Frame Buffer Intel® FPGA IP 30. Video Streaming FIFO Intel® FPGA IP 31. Video Timing Generator Intel® FPGA IP 32. Warp Intel® FPGA IP 33. Design Security 34. Document Revision History for Video and Vision Processing Suite User Guide
1. About the Video and Vision Processing Suite x
1.1. Video and Vision Processing IPs Features 1.2. Device Family Support 1.3. Video and Vision Processing IPs Release Information 1.4. Lite versus Full IP Variants 1.5. Glossary of Video and Vision Terminology
2. Getting Started with the Video and Vision Processing IPs x
2.1. Video and Vision Processing IP Evaluation Time-out Behavior 2.2. Generating a Video and Vision Processing IP 2.3. Simulating the Video and Vision Processing IPs
3. Video and Vision Processing IPs Functional Description x
3.1. Auxiliary Control Packets 3.2. Latency 3.3. IP Debugging Features 3.4. Stall Behavior and Error Recovery 3.5. Avalon Streaming Video Protocol Versus Intel FPGA Streaming Video Protocol
5. Video and Vision Processing IP Registers x
5.1. Video and Vision Processing IP Control Examples
7. Protocol Converter Intel® FPGA IP x
7.1. About the Protocol Converter IP 7.2. Protocol Converter IP Parameters 7.3. Protocol Converter IP Functional Description 7.4. Protocol Converter IP Interfaces 7.5. Protocol Converter IP Registers 7.6. Protocol Converter IP Software API
7.1. About the Protocol Converter IP x
7.1.1. Protocol Converter IP Performance and Resources
8. 3D LUT Intel® FPGA IP x
8.1. About the 3D LUT Intel® FPGA IP 8.2. 3D LUT IP Parameters 8.3. 3D LUT IP Block Description 8.4. 3D LUT IP Registers 8.5. 3D LUT IP Software API
8.1. About the 3D LUT Intel® FPGA IP x
8.1.1. 3D LUT IP Features 8.1.2. 3D LUT IP Performance IP and Resource Information
8.3. 3D LUT IP Block Description x
8.3.1. 3D LUT IP Interfaces 8.3.2. 3D LUT IP Latency
9. AXI-Stream Broadcaster Intel® FPGA IP x
9.1. About the AXI-Stream Broadcaster IP 9.2. AXI-Stream Broadcaster IP Parameters 9.3. AXI-Stream Broadcaster IP Interfaces
9.1. About the AXI-Stream Broadcaster IP x
9.1.1. AXI-Stream Broadcaster IP Features 9.1.2. AXI-Stream Broadcaster IP Performance and Resources
10. Chroma Resampler Intel® FPGA IP x
10.1. About the Chroma Resampler IP 10.2. Chroma Resampler IP Parameters 10.3. Chroma Resampler IP Functional Description 10.4. Chroma Resampler IP Registers 10.5. Chroma Resampler IP Software API
10.1. About the Chroma Resampler IP x
10.1.1. Chroma Resampler Performance and Resources
10.3. Chroma Resampler IP Functional Description x
10.3.1. Chroma Resampler IP Interfaces
11. Clipper Intel® FPGA IP x
11.1. About the Clipper IP 11.2. Clipper IP Parameters 11.3. Clipper IP Interfaces 11.4. Clipper IP Registers 11.5. Clipper IP Software API
11.1. About the Clipper IP x
11.1.1. Clipper IP Performance and Resources
12. Clocked Video Input Intel® FPGA IP x
12.1. About the Clocked Video Input IP 12.2. Initializing the Clocked Video Input IP 12.3. Clocked Video Input IP Parameters 12.4. Clocked Video Input IP Interfaces 12.5. Clocked Video Input IP Registers 12.6. Clocked Video Input IP Software API
12.1. About the Clocked Video Input IP x
12.1.1. Clocked Video Input IP Features 12.1.2. Clocked Video Input IP Performance and Resources
13. Clocked Video to Full-Raster Converter Intel® FPGA IP x
13.1. About the Clocked Video to Full-Raster Converter IP 13.2. Clocked Video to Full-Raster Converter Parameters 13.3. Clocked Video to Full-Raster Converter Block Description 13.4. Clocked Video Converter to Full-Raster IP Registers
13.1. About the Clocked Video to Full-Raster Converter IP x
13.1.1. Clocked Video to Full-Raster Converter Features 13.1.2. Clocked Video to Full-Raster Converter Performance and Resources
13.3. Clocked Video to Full-Raster Converter Block Description x
13.3.1. Clocked Video to Full-Raster Converter Interfaces
14. Clocked Video Output Intel® FPGA IP x
14.1. About the Clocked Video Output IP 14.2. Clocked Video Output IP Parameters 14.3. Clocked Video Output IP Functional Description 14.4. Clocked Video Output IP Interfaces 14.5. Clocked Video Output IP Registers 14.6. Clocked Video Output IP Software API
14.1. About the Clocked Video Output IP x
14.1.1. Clocked Video Output IP Performance and Resources 14.1.2. Clocked Video Output IP Features
15. Color Space Converter Intel® FPGA IP x
15.1. About the Color Space Converter IP 15.2. Color Space Converter IP Parameters 15.3. Color Space Converter IP Functional Description 15.4. Color Space Converter IP Registers 15.5. Color Space Converter IP Software API
15.1. About the Color Space Converter IP x
15.1.1. Color Space Converter IP Features 15.1.2. Color Space Converter IP Performance and Resources
15.3. Color Space Converter IP Functional Description x
15.3.1. Color Space Converter IP Interfaces
16. Deinterlacer Intel® FPGA IP x
16.1. About the Deinterlacer IP 16.2. Deinterlacer Parameters 16.3. Deinterlacer Interfaces 16.4. Deinterlacer Registers 16.5. Deinterlacer IP Software API
16.1. About the Deinterlacer IP x
16.1.1. Deinterlacer Performance and Resources
17. FIR Filter Intel® FPGA IP x
17.1. About the FIR Filter 17.2. FIR Filter Parameters 17.3. FIR Filter IP Operation 17.4. FIR Filter Interfaces 17.5. FIR Filter Registers 17.6. FIR Filter IP Software API
17.3. FIR Filter IP Operation x
17.3.1. FIR Filter Processing 17.3.2. FIR Filter Precision 17.3.3. FIR Coefficient Specification 17.3.4. FIR Filter Symmetry 17.3.5. Result to Output Data Type Conversion
17.3.4. FIR Filter Symmetry x
17.3.4.1. No Symmetry 17.3.4.2. Horizontal Symmetry 17.3.4.3. Vertical Symmetry 17.3.4.4. Horizontal and Vertical Symmetry 17.3.4.5. Diagonal Symmetry
18. Frame Cleaner Intel® FPGA IP x
18.1. About the Frame Cleaner IP 18.2. Frame Cleaner IP Parameters 18.3. Frame Cleaner IP Functional Description 18.4. Frame Cleaner IP Interfaces 18.5. Frame Cleaner IP Registers 18.6. Frame Cleaner IP Software API
18.1. About the Frame Cleaner IP x
18.1.1. Frame Cleaner IP Performance and Resources
19. Full-Raster to Clocked Video Converter Intel® FPGA IP x
19.1. About the Full-Raster to Clocked Video Converter 19.2. Full Raster to Clocked Video Converter Parameters 19.3. Full-Raster to Clocked Video Converter Block Description 19.4. Full-Raster to Clocked Video Converter Registers
19.1. About the Full-Raster to Clocked Video Converter x
19.1.1. Full-Raster to Clocked Video Converter Features 19.1.2. Full-Raster to Clocked Video Converter Performance and Resource Utilization
19.3. Full-Raster to Clocked Video Converter Block Description x
19.3.1. Full Raster to Clocked Video Converter Interfaces
20. Full-Raster to Streaming Converter Intel® FPGA IP x
20.1. About the Full-Raster to Streaming Converter IP 20.2. Full-Raster to Streaming Converter Parameters 20.3. Full-Raster to Streaming Converter Block Description
20.1. About the Full-Raster to Streaming Converter IP x
20.1.1. Full-Raster to Streaming Converter Features 20.1.2. Full-Raster to Streaming Converter Performance and Resources
20.3. Full-Raster to Streaming Converter Block Description x
20.3.1. Full-Raster to Streaming Converter Interfaces
21. Generic Crosspoint Intel® FPGA IP x
21.1. About the Generic Crosspoint IP 21.2. Generic Crosspoint IP Parameters 21.3. Generic Crosspoint IP Interfaces 21.4. Generic Crosspoint IP Registers 21.5. Generic Crosspoint IP Software API
21.1. About the Generic Crosspoint IP x
21.1.1. Generic Crosspoint IP Features 21.1.2. Generic Crosspoint Performance and Resources
22. Genlock Signal Router Intel® FPGA IP x
22.1. About the Genlock Signal Router IP 22.2. Genlock Signal Router IP Parameters 22.3. Genlock Signal Router IP Interfaces 22.4. Genlock Signal Router IP Registers 22.5. Genlock Signal Router IP Software API
22.1. About the Genlock Signal Router IP x
22.1.1. Genlock Signal Router IP Features 22.1.2. Genlock Signal Router IP Performance and Resources
23. Guard Bands Intel® FPGA IP x
23.1. About the Guard Bands IP 23.2. Guard Bands IP Parameters 23.3. Guard Bands IP Interfaces 23.4. Guard Bands IP Registers 23.5. Guard Bands IP Software API
23.1. About the Guard Bands IP x
23.1.1. Guard Bands IP Performance and Resources
24. Mixer Intel® FPGA IP x
24.1. About the Mixer IP 24.2. Mixer IP Parameters 24.3. Mixer IP Functional Description 24.4. Mixer IP Registers 24.5. Mixer IP Software API
24.1. About the Mixer IP x
24.1.1. Mixer IP Performance and Resources
24.3. Mixer IP Functional Description x
24.3.1. Mixer IP Interfaces
25. Pixels in Parallel Converter Intel® FPGA IP x
25.1. About the Pixels in Parallel Converter IP 25.2. Pixels in Parallel IP Converter Parameters 25.3. Pixels in Parallel Converter Interfaces 25.4. Pixels in Parallel Converter Registers 25.5. Pixels in Parallel Converter IP Software API
25.1. About the Pixels in Parallel Converter IP x
25.1.1. Pixels in Parallel IP Converter Performance and Resources
26. Scaler Intel® FPGA IP x
26.1. About the Scaler 26.2. Scaler IP Parameters 26.3. Scaler IP Functional Description 26.4. Scaler IP Registers 26.5. Scaler IP Software API
26.1. About the Scaler x
26.1.1. Scaler IP Performance and Resources
26.2. Scaler IP Parameters x
26.2.1. Updating Scaler IP Runtime Coefficients 26.2.2. Scaler Maximum Resolution
26.3. Scaler IP Functional Description x
26.3.1. Partial Frame Scaling 26.3.2. Scaler IP Interfaces
27. Tone Mapping Operator Intel® FPGA IP x
27.1. About the Tone Mapping Operator IP 27.2. TMO IP Parameters 27.3. TMO IP Block Description 27.4. TMO IP Registers 27.5. TMO IP Software API
27.1. About the Tone Mapping Operator IP x
27.1.1. TMO IP Features 27.1.2. TMO IP Performance and Resource Utilization
27.3. TMO IP Block Description x
27.3.1. TMO IP Interfaces 27.3.2. TMO IP Latency
28. Test Pattern Generator Intel® FPGA IP x
28.1. About the Test Pattern Generator IP 28.2. Test Pattern Generator IP Parameters 28.3. Test Pattern Generator IP Functional Description 28.4. Test Pattern Generator IP Registers 28.5. Test Pattern Generator IP Software API
28.1. About the Test Pattern Generator IP x
28.1.1. Test Pattern Generator IP Performance and Resources
28.3. Test Pattern Generator IP Functional Description x
28.3.1. Test Pattern Generator IP Interfaces
29. Video Frame Buffer Intel® FPGA IP x
29.1. About the Video Frame Buffer IP 29.2. Video Frame Buffer IP Parameters 29.3. Video Frame Buffer IP Functional Description 29.4. Video Frame Buffer IP Registers 29.5. Video Frame Buffer IP Software API
29.1. About the Video Frame Buffer IP x
29.1.1. Video Frame Buffer Performance and Resources
29.3. Video Frame Buffer IP Functional Description x
29.3.1. Video Frame Buffer IP Interfaces
30. Video Streaming FIFO Intel® FPGA IP x
30.1. About the Video Streaming FIFO IP 30.2. Video Streaming FIFO IP Parameters 30.3. Video Streaming FIFO IP Interfaces
30.1. About the Video Streaming FIFO IP x
30.1.1. Video Streaming FIFO IP Performance and Resources
31. Video Timing Generator Intel® FPGA IP x
31.1. About the Video Timing Generator IP 31.2. Video Timing Generator IP Parameters 31.3. Video Timing Generator IP Functional Description 31.4. Video Timing Generator IP Interfaces 31.5. Video Timing Generator IP Registers 31.6. Video Timing Generator IP Software API
31.1. About the Video Timing Generator IP x
31.1.1. Video Timing Generator IP Features 31.1.2. Video Timing Generator IP Performance and Resources
32. Warp Intel® FPGA IP x
32.1. About the Warp IP 32.2. Warp IP Parameters 32.3. Warp IP Block Description 32.4. Warp IP Registers 32.5. Warp IP Software API
32.1. About the Warp IP x
32.1.1. Warp IP Features 32.1.2. Warp IP Performance and Resource Utilization
32.3. Warp IP Block Description x
32.3.1. Warp IP Interfaces 32.3.2. Warp IP Latency 32.3.3. External Memory for Warp IP
32.5. Warp IP Software API x
32.5.1. Using Warp IP Software 32.5.2. Warp IP Software Code Examples
33. Design Security x
33.1. Memory Subsystems 33.2. Considering Design Security
1. About the Video and Vision Processing Suite
2. Getting Started with the Video and Vision Processing IPs
3. Video and Vision Processing IPs Functional Description
4. Video and Vision Processing IP Interfaces
5. Video and Vision Processing IP Registers
6. Video and Vision Processing IPs Software Programming Model
7. Protocol Converter Intel® FPGA IP
8. 3D LUT Intel® FPGA IP
9. AXI-Stream Broadcaster Intel® FPGA IP
10. Chroma Resampler Intel® FPGA IP
11. Clipper Intel® FPGA IP
12. Clocked Video Input Intel® FPGA IP
13. Clocked Video to Full-Raster Converter Intel® FPGA IP
14. Clocked Video Output Intel® FPGA IP
15. Color Space Converter Intel® FPGA IP
16. Deinterlacer Intel® FPGA IP
17. FIR Filter Intel® FPGA IP
18. Frame Cleaner Intel® FPGA IP
19. Full-Raster to Clocked Video Converter Intel® FPGA IP
20. Full-Raster to Streaming Converter Intel® FPGA IP
21. Generic Crosspoint Intel® FPGA IP
22. Genlock Signal Router Intel® FPGA IP
23. Guard Bands Intel® FPGA IP
24. Mixer Intel® FPGA IP
25. Pixels in Parallel Converter Intel® FPGA IP
26. Scaler Intel® FPGA IP
27. Tone Mapping Operator Intel® FPGA IP
28. Test Pattern Generator Intel® FPGA IP
29. Video Frame Buffer Intel® FPGA IP
30. Video Streaming FIFO Intel® FPGA IP
31. Video Timing Generator Intel® FPGA IP
32. Warp Intel® FPGA IP
33. Design Security
34. Document Revision History for Video and Vision Processing Suite User Guide

12.6. Clocked Video Input IP Software API

The IP has a software driver for software control of the IP at run time. The IP does not fit any of the generic device models provided by the Nios II HAL. It exposes a set of dedicated accessors to the control and status registers. The driver structure inherits the base driver structure so all common methods described in Video and Vision Processing IPs Software API are applicable.

intel_vvp_cvi_init

prototype:

int intel_vvp_cvi_init(intel_vvp_cvi_instance* instance, intel_vvp_core_base base);

description:

Initialization function for a VVP CVI instance.

Attempts to initialize the fields of the CVI and its base core

argument:

instance, pointer to the intel_vvp_ cvi _instance to initialize

base, the accessor for the core (on Nios this is a pointer to the base address of the core)

return value:

kIntelVvpCoreOk success

kIntelVvpCoreVidErr if the vendor id of the core is not the IntelFPGA vendor ID.

kIntelVvpCorePidErr if the product id of the core is not the cvi product id

kIntelVvpCoreInstanceErr if the instance parameter is zero (null pointer)

intel_vvp_cvi_get_param_vid_pid

prototype:

int intel_vvp_cvi_get_param_vid_pid(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

The product ID number

intel_vvp_cvi_get_param_version_number

prototype:

int intel_vvp_cvi_get_param_version_number(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

The IP version number

intel_vvp_cvi_get_param_pip

prototype:

int intel_vvp_cvi_get_param_pip(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

The number of pixels in parallel

intel_vvp_cvi_get_param_color_planes

prototype:

int intel_vvp_cvi_get_param_color_planes(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

The number of color planes

intel_vvp_cvi_get_param_bps

prototype:

int intel_vvp_cvi_get_param_bps(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

The number of bits per sample

intel_vvp_cvi_get_param_tready_present

prototype:

int intel_vvp_cvi_get_param_tready_present(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the TREADY signal is present on the input interface, otherwise the conduit is not present

intel_vvp_cvi_get_param_line_buffer_depth

prototype:

int intel_vvp_cvi_get_param_line_buffer_depth(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

The maximum depth of the output video line buffer

intel_vvp_cvi_get_param_extended_video_metrics_enabled

prototype:

int intel_vvp_cvi_get_param_extended_video_metrics_enabled(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the extended video metric logic was included during build-time

intel_vvp_cvi_get_param_clk_freq_out

prototype:

int intel_vvp_cvi_get_param_clk_freq_out(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

The output video frequency in Hz

intel_vvp_cvi_enable_go

prototype:

int intel_vvp_cvi_enable_go(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_disable_go

prototype:

int intel_vvp_cvi_disable_go(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_go

prototype:

uint16_t intel_vvp_cvi_get_go(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the go bit

intel_vvp_cvi_enable_status_update_interrupt

prototype:

int intel_vvp_cvi_enable_status_update_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_disable_status_update_interrupt

prototype:

int intel_vvp_cvi_disable_status_update_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_disable_status_update_interrupt

prototype:

uint16_t intel_vvp_cvi_get_status_update_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the status_update_interrupt bit

intel_vvp_cvi_enable_end_of_field_frame_interrupt

prototype:

int intel_vvp_cvi_enable_end_of_field_frame_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_disable_end_of_field_frame_interrupt

prototype:

int intel_vvp_cvi_disable_end_of_field_frame_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_end_of_field_frame_interrupt

prototype:

uint16_t intel_vvp_cvi_get_end_of_field_frame_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the end_of_field_frame_interrupt bit

intel_vvp_cvi_enable_frame_cleaner

prototype:

int intel_vvp_cvi_enable_frame_cleaner(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_disable_frame_cleaner

prototype:

int intel_vvp_cvi_disable_frame_cleaner(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_frame_cleaner

prototype:

uint16_t intel_vvp_cvi_get_frame_cleaner(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the frame_cleaner bit

intel_vvp_cvi_enable_auto_polarity_detection

prototype:

int intel_vvp_cvi_enable_auto_polarity_detection(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_disable_auto_polarity_detection

prototype:

int intel_vvp_cvi_disable_auto_polarity_detection(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_auto_polarity_detection

prototype:

uint16_t intel_vvp_cvi_get_auto_polarity_detection(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the auto_polarity_detection bit

intel_vvp_cvi_set_manual_vsync_polarity_high

prototype:

int intel_vvp_cvi_set_manual_vsync_polarity_high(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_manual_vsync_polarity_low

prototype:

int intel_vvp_cvi_set_manual_vsync_polarity_low(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_manual_vsync_polarity

prototype:

uint16_t intel_vvp_cvi_get_manual_vsync_polarity(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the manual_vsync_polarity bit

intel_vvp_cvi_set_manual_hsync_polarity_high

prototype:

int intel_vvp_cvi_set_manual_hsync_polarity_high(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_manual_hsync_polarity_low

prototype:

int intel_vvp_cvi_set_manual_hsync_polarity_low(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_manual_hsync_polarity

prototype:

uint16_t intel_vvp_cvi_get_manual_hsync_polarity(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the manual_hsync_polarity bit

intel_vvp_cvi_is_producing_data

prototype:

bool intel_vvp_cvi_is_producing_data(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_interlaced

prototype:

bool intel_vvp_cvi_is_interlaced(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_blank_timing

prototype:

bool intel_vvp_cvi_is_blank_timing(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_overflowed

prototype:

bool intel_vvp_cvi_is_overflowed(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_internal_locked_high

prototype:

bool intel_vvp_cvi_is_internal_locked_high(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_external_locked_high

prototype:

bool intel_vvp_cvi_is_external_locked_high(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_picture_drop

prototype:

bool intel_vvp_cvi_is_picture_drop(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_vsync_high

prototype:

bool intel_vvp_cvi_is_vsync_high(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_is_hsync_high

prototype:

bool intel_vvp_cvi_is_hsync_high(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

1 if the bit is asserted, otherwise 0

intel_vvp_cvi_clear_status_update_interrupt

prototype:

int intel_vvp_cvi_clear_status_update_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_status_update_interrupt

prototype:

int intel_vvp_cvi_get_status_update_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the status_update_interrupt bit

intel_vvp_cvi_clear_end_of_field_interrupt

prototype:

int intel_vvp_cvi_clear_end_of_field_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_get_end_of_field_interrupt

prototype:

uint16_t intel_vvp_cvi_get_end_of_field_interrupt(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the end_of_field_interrupt bit

intel_vvp_cvi_get_total_sample_count

prototype:

uint16_t intel_vvp_cvi_get_total_sample_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the total_sample_count register field

intel_vvp_cvi_get_active_sample_count

prototype:

uint16_t intel_vvp_cvi_get_active_sample_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the active_sample_count register field

intel_vvp_cvi_get_active_line_count_f0

prototype:

uint16_t intel_vvp_cvi_get_active_line_count_f0(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the active_line_count_f0 register field

intel_vvp_cvi_get_active_line_count_f1

prototype:

uint16_t intel_vvp_cvi_get_active_line_count_f1(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the active_line_count_f1 register field

intel_vvp_cvi_get_total_line_count_f0

prototype:

uint16_t intel_vvp_cvi_get_total_line_count_f0(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the total_line_count_f0 register field

intel_vvp_cvi_get_total_line_count_f1

prototype:

uint16_t intel_vvp_cvi_get_total_line_count_f1(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the total_line_count_f1 register field

intel_vvp_cvi_get_reference_height_count

prototype:

uint16_t intel_vvp_cvi_get_reference_height_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the reference_height_count register field

intel_vvp_cvi_get_reference_width_count

prototype:

uint16_t intel_vvp_cvi_get_reference_width_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the reference_width_count register field

intel_vvp_cvi_get_reference_frames_count

prototype:

uint16_t intel_vvp_cvi_get_reference_frames_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the reference_frame_count register field

intel_vvp_cvi_get_reference_lines_count

prototype:

uint16_t intel_vvp_cvi_get_reference_lines_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the reference_lines_count register field

intel_vvp_cvi_get_clk_in_freq_count

prototype:

uint16_t intel_vvp_cvi_get_clk_in_freq_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the clk_in_freq_count register field

intel_vvp_cvi_get_tpg_comp4

prototype:

uint16_t intel_vvp_cvi_get_tpg_comp4(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the tpg_comp4 register field

intel_vvp_cvi_get_tpg_comp3

prototype:

uint16_t intel_vvp_cvi_get_tpg_comp3(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the tpg_comp3 register field

intel_vvp_cvi_get_tpg_comp2

prototype:

uint16_t intel_vvp_cvi_get_tpg_comp2(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the tpg_comp2 register field

intel_vvp_cvi_get_tpg_comp1

prototype:

uint16_t intel_vvp_cvi_get_tpg_comp1(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the tpg_comp1 register field

intel_vvp_cvi_get_total_fr_pixels_per_frames_count

prototype:

uint16_t intel_vvp_cvi_get_total_fr_pixels_per_frames_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the total_fr_pixels_per_frames_count register field

intel_vvp_cvi_get_total_active_pixels_per_frames_count

prototype:

uint16_t intel_vvp_cvi_get_total_active_pixels_per_frames_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the total_active_pixels_per_frames_count register field

intel_vvp_cvi_get_fr_blanking_pixels_count

prototype:

uint16_t intel_vvp_cvi_get_fr_blanking_pixels_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the fr_blanking_pixels_count register field

intel_vvp_cvi_get_fr_blanking_lines_count

prototype:

uint16_t intel_vvp_cvi_get_fr_blanking_lines_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the fr_blanking_lines_count register field

intel_vvp_cvi_get_hpulse_count

prototype:

uint16_t intel_vvp_cvi_get_hpulse_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the hpulse_count register field

intel_vvp_cvi_get_hfp_count

prototype:

uint16_t intel_vvp_cvi_get_hfp_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the hfp_count register field

intel_vvp_cvi_get_hbp_count

prototype:

uint16_t intel_vvp_cvi_get_hbp_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the hbp_count register field

intel_vvp_cvi_get_f0_vfp_count

prototype:

uint16_t intel_vvp_cvi_get_f0_vfp_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f0_vfp_count register field

intel_vvp_cvi_get_f1_vfp_count

prototype:

uint16_t intel_vvp_cvi_get_f1_vfp_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f1_vfp_count register field

intel_vvp_cvi_get_f0_vpulse_count

prototype:

uint16_t intel_vvp_cvi_get_f0_vpulse_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f0_vpulse_count register field

intel_vvp_cvi_get_f1_vpulse_count

prototype:

uint16_t intel_vvp_cvi_get_f1_vpulse_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f1_vpulse_count register field

intel_vvp_cvi_get_f0_vbp_count

prototype:

uint16_t intel_vvp_cvi_get_f0_vbp_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f0_vbp_count register field

intel_vvp_cvi_get_f1_vbp_count

prototype:

uint16_t intel_vvp_cvi_get_f1_vbp_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f1_vbp_count register field

intel_vvp_cvi_get_hpulse_ref_count

prototype:

uint16_t intel_vvp_cvi_get_hpulse_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the hpulse_count register field

intel_vvp_cvi_get_hfp_ref_count

prototype:

uint16_t intel_vvp_cvi_get_hfp_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the hfp_ref_count register field

intel_vvp_cvi_get_hbp_ref_count

prototype:

uint16_t intel_vvp_cvi_get_hbp_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the hbp_ref_count register field

intel_vvp_cvi_get_f0_vfp_ref_count

prototype:

uint16_t intel_vvp_cvi_get_f0_vfp_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f0_vfp_ref_count register field

intel_vvp_cvi_get_f1_vfp_ref_count

prototype:

uint16_t intel_vvp_cvi_get_f1_vfp_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f1_vfp_ref_count register field

intel_vvp_cvi_get_f0_vpulse_ref_count

prototype:

uint16_t intel_vvp_cvi_get_f0_vpulse_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f0_vpulse_ref_count register field

intel_vvp_cvi_get_f1_vpulse_ref_count

prototype:

uint16_t intel_vvp_cvi_get_f1_vpulse_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f1_vpulse_ref_count register field

intel_vvp_cvi_get_f0_vbp_ref_count

prototype:

uint16_t intel_vvp_cvi_get_f0_vbp_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f0_vbp_ref_count register field

intel_vvp_cvi_get_f1_vbp_ref_count

prototype:

uint16_t intel_vvp_cvi_get_f1_vbp_ref_count(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the f1_vbp_ref_count register field

intel_vvp_cvi_get_input_freq_mhz

prototype:

float intel_vvp_cvi_get_input_freq_mhz(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of the clock input frequency value

intel_vvp_cvi_get_fps

prototype:

float intel_vvp_cvi_get_fps(intel_vvp_cvi_instance* instance);

argument:

instance, pointer to the intel_vvp_cvi_instance

return value:

the current value of number of frames per seconds

intel_vvp_cvi_set_reference_height_count

prototype:

int intel_vvp_cvi_set_reference_height_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output height counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_reference_width_count

prototype:

int intel_vvp_cvi_set_reference_width_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output width counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_reference_frames_count

prototype:

int intel_vvp_cvi_set_reference_frames_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output frame counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_reference_lines_count

prototype:

int intel_vvp_cvi_set_reference_lines_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output line counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_tpg_comp4

prototype:

int intel_vvp_cvi_set_tpg_comp4(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the pixel value for color plane # 4

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_tpg_comp3

prototype:

int intel_vvp_cvi_set_tpg_comp3(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the pixel value for color plane # 3

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_tpg_comp2

prototype:

int intel_vvp_cvi_set_tpg_comp2(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the pixel value for color plane # 2

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_tpg_comp1

prototype:

int intel_vvp_cvi_set_tpg_comp1(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the pixel value for color plane # 1

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_hpulse_ref_count

prototype:

intel_vvp_cvi_set_hpulse_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output hpulse counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_hfp_ref_count

prototype:

intel_vvp_cvi_set_hfp_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output hfp counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_hbp_ref_count

prototype:

intel_vvp_cvi_set_hbp_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output hbp counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_f0_vfp_ref_count

prototype:

intel_vvp_cvi_set_f0_vfp_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output f0_vfp counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_f1_vfp_ref_count

prototype:

intel_vvp_cvi_set_f1_vfp_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output f1_vfp counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_f0_vpulse_ref_count

prototype:

intel_vvp_cvi_set_f0_vpulse_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output f0_vpulse counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_f1_vpulse_ref_count

prototype:

intel_vvp_cvi_set_f1_vpulse_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output f1_vpulse counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_f0_vbp_ref_count

prototype:

intel_vvp_cvi_set_f0_vbp_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output f0_vbp counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

intel_vvp_cvi_set_f1_vbp_ref_count

prototype:

intel_vvp_cvi_set_f1_vbp_ref_count(intel_vvp_cvi_instance* instance, uint16_t in_val);

argument:

instance, pointer to the intel_vvp_cvi_instance

in_val, the reference value for the output f1_vbp counter

return value:

if success kIntelVvpCviOk, otherwise kIntelVvpCviInstanceErr

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