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1. About the Video and Vision Processing Suite
2. Getting Started with the Video and Vision Processing IPs
3. Video and Vision Processing IPs Functional Description
4. Video and Vision Processing IP Interfaces
5. Video and Vision Processing IP Registers
6. Video and Vision Processing IPs Software Programming Model
7. Protocol Converter Intel® FPGA IP
8. 3D LUT Intel® FPGA IP
9. AXI-Stream Broadcaster Intel® FPGA IP
10. Chroma Resampler Intel® FPGA IP
11. Clipper Intel® FPGA IP
12. Clocked Video Input Intel® FPGA IP
13. Clocked Video to Full-Raster Converter Intel® FPGA IP
14. Clocked Video Output Intel® FPGA IP
15. Color Space Converter Intel® FPGA IP
16. Deinterlacer Intel® FPGA IP
17. FIR Filter Intel® FPGA IP
18. Frame Cleaner Intel® FPGA IP
19. Full-Raster to Clocked Video Converter Intel® FPGA IP
20. Full-Raster to Streaming Converter Intel® FPGA IP
21. Generic Crosspoint Intel® FPGA IP
22. Genlock Signal Router Intel® FPGA IP
23. Guard Bands Intel® FPGA IP
24. Mixer Intel® FPGA IP
25. Pixels in Parallel Converter Intel® FPGA IP
26. Scaler Intel® FPGA IP
27. Tone Mapping Operator Intel® FPGA IP
28. Test Pattern Generator Intel® FPGA IP
29. Video Frame Buffer Intel® FPGA IP
30. Video Streaming FIFO Intel® FPGA IP
31. Video Timing Generator Intel® FPGA IP
32. Warp Intel® FPGA IP
33. Design Security
34. Document Revision History for Video and Vision Processing Suite User Guide
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12.1.2. Clocked Video Input IP Performance and Resources
Intel provides resource and utilization data for guidance. The IP resource usage depends on the device family, number of supported bits per sample, pixels in parallel, number of color planes and maximum depth of video line buffer.
Target Device | ALMs | M20Ks | Input Clock fMAX MHz | Output Clock fMAX MHz |
---|---|---|---|---|
Intel Agilex (AGFA012R24A2E2V)
|
971 | 2 | 781 | 781 |
Intel Arria 10 (10AS066H1F34E1HG)
|
692 | 2 | 609 | 533 |
Intel Cyclone 10 GX (10CX220YF672E5G)
|
693 | 2 | 506 | 511 |
Intel Stratix 10 (1SX280LN2F43E1VG)
|
883 | 2 | 747 | 660 |