Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 8/08/2022

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16.2. Deinterlacer Parameters

The IP offers run- and compile-time parameters.
Parameter Values Description
Video Data Format
Bits per color sample 8 to 16 Select the number of bits per color sample.
Number of color planes 1 to 4 Select the number of color planes per pixel.
Number of pixels in parallel 1 to 8 Select the number of pixels in parallel.
Lite mode On or off Turn on to operate the bob deinterlacer in lite mode.
Memory-mapped control interface On or off

Turn on to read frame statistics and turn the bob deinterlacer on and off using an Avalon memory-mapped interface.

The memory-mapped control interface is mandatory in lite mode.

Separate clock for control interface On or off Turn on for a separate clock for the control interface.
Deinterlacer Behavior
Bob deinterlacing mode




Select to drop of F0 or F1 input fields.
Maximum Frame Size
Maximum field width 32 to 16384 Select the maximum field width to determine the size of the line buffer. Set this parameter to the line length of the widest fields you want to deinterlace. Progressive frames of any size pass through unchanged.
Debug features On or off Turn on to enable debug features (not applicable for lite mode).
Figure 38. Deinterlacer GUI
Figure 39. Bob Deinterlacing ModeThe figure shows the bob deinterlacing modes where the IP drops or deinterlaces interlaced fields. The IP passes all progressive frames through.

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