Intel® Quartus® Prime Standard Edition User Guide: Design Optimization

ID 683230
Date 11/12/2018
Document Table of Contents

5.1.4. Viewing Available Clock Networks in the Device

When you enable a clock region layer in the Layers Settings pane, you display the areas of the chip that are driven by global and regional clock networks. When the selected device does not contain a given clock region, the option for that category is unavailable in the dialog box.

This global clock display feature is available for Arria® V, Intel® Arria® 10, Cyclone® V, Stratix® IV, and Stratix® V device families.

Figure 34. Clock Regions
  • Depending on the clock layers that you activate in the Layers Settings pane, the Chip Planner displays regional and global clock regions in the device, and the connectivity between clock regions, pins, and PLLs.
  • Clock regions appear as rectangular overlay boxes with labels indicating the clock type and index. Select a clock network region by clicking the clock region. The clock-shaped icon at the top-left corner indicates that the region represents a clock network region.
  • Spine/sector clock regions have a dotted vertical line in the middle. This dotted line indicates where two columns of row clocks meet in a sector clock.
  • To change the color in which the Chip Planner displays clock regions, select Tools > Options > Colors > Clock Regions.