Intel® Quartus® Prime Standard Edition User Guide: Design Optimization

ID 683230
Date 11/12/2018
Document Table of Contents sload and sclr Signals

Each LE register contains a synchronous load (sload) signal and a synchronous clear (sclr) signal. You can invert either the sload or sclr signal feeding into the LE.

If the design uses the sload signal in an LE, the signal and its inversion state must be the same for all other LEs in the same LAB. For example, if two LEs in a LAB have the sload signal connected, both LEs must have the sload signal set to the same value. This is also true for the sclr signal.