5.3.1. Viewing Connections Between Logic Lock (Standard) Regions in the Chip Planner
The Chip Planner shows the connections between Logic Lock (Standard) regions. By default, you can view each connection as an individual line. You can choose to display connections between two Logic Lock (Standard) regions as a single bundled connection rather than as individual connection lines. To use this option, open the Chip Planner and on the View menu, click Inter-region Bundles.
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