Intel® Quartus® Prime Standard Edition User Guide: Design Optimization

ID 683230
Date 11/12/2018
Public
Document Table of Contents

3.3.2.6. Auto Shift Register Replacement

During Synthesis, the Compiler can convert shift registers or register chains into RAMs to save area. However, conversion to RAM often reduces speed. The names of the converted registers include "altshift_taps".
  • If paths that fail timing begin or end in shift registers, consider disabling the Auto Shift Register Replacement option. Do not convert registers that are intended for pipelining.
  • For shift registers that are converted to a chain, evaluate area/speed trade off of implementing in RAM or logic cells.
  • If a design is close to full, you can save area by shifting register conversion to RAM, benefiting non-critical clock domains. You can change the settings from the default AUTO to OFF globally, or on a register or hierarchy basis.

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