Intel® Quartus® Prime Standard Edition User Guide: Design Optimization

ID 683230
Date 11/12/2018
Public
Document Table of Contents

3.6.2. Setting Periphery to Core Optimizations in the Assignment Editor

When you turn on the Periphery to Core Placement and Routing Optimization (P2C/C2P) setting in the Assignment Editor, the Intel® Quartus® Prime software performs periphery to core, or core to periphery optimizations on selected instances in your design.

You can optionally perform periphery to core optimizations by instance with settings in the Advanced Fitter Settings dialog box.

  1. In the Intel® Quartus® Prime software, click Assignments > Assignment Editor.
  2. For the selected path, double-click the Assignment Name column, and then click the Periphery to core register placement and routing optimization option in the drop-down list.
  3. In the To column, choose either a periphery node or core register node on a P2C/C2P path you want to optimize. Leave the From column empty.
    For paths to appear in the Assignments Editor, you must first run Analysis & Synthesis on your design.

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