External Memory Interfaces Intel® Arria® 10 FPGA IP User Guide

ID 683106
Date 12/19/2023

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.4.22. sideband10

address=53(32 bit)

Field Bit High Bit Low Description Access
mmr_dpd_mps_ack 0 0

Deep Power Down/Maximum Power Saving In Progress. Acknowledgement signal for the deep power down/maximum power saving request. A value of 1 indicates that the memory is in deep power down/maximum power saving mode.