External Memory Interfaces Intel® Arria® 10 FPGA IP User Guide

ID 683106
Date 5/10/2023
Document Table of Contents EMIF On-Chip Debug Port

Access to on-chip debug is provided through software running on a Nios processor connected to the external memory interface.

If you enable the Use Soft Nios Processor for On-Chip Debug option, the system instantiates a soft Nios processor, and software files are provided as part of the EMIF IP.

Instructions on how to use the software are available in the following file: : <variation_name>/altera_emif_arch_nf_<version number>/<synth|sim>/<variation_name>_altera_emif_arch_nf_<version number>_<unique ID>_readme.txt.

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