External Memory Interfaces Intel® Arria® 10 FPGA IP User Guide

ID 683106
Date 5/10/2023
Document Table of Contents

4.4.24. sideband12

address=55(32 bit)

Field Bit High Bit Low Description Access
mr_cmd_type 2 0 Register command type. Indicates the type of register command. Read/Write
000 - Mode Register Set (DDR3, DDR4, and LPDDR3)
001 - Mode register read (LPDDR3 only)
010 - Multipurpose Register Read (DDR4 only)
Others - Reserved
mr_cmd_rank 6 3 Register command rank. Indicates the rank targeted by the register command. Read/Write
0001 - Chip select 0
0010 - Chip select 1
0011 - Chip select 0 and chip select 1
1111 - all chip selects
Mode Register Set - Any combination of chip selects.
Mode Register Read - Only one chip select is allowed.
Multipurpose Register Read - Only one chip select is allowed.

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