External Memory Interfaces Intel® Arria® 10 FPGA IP User Guide

ID 683106
Date 5/10/2023
Document Table of Contents mem for LPDDR3

Interface between FPGA and external memory

Table 84.  Interface: memInterface type: Conduit
Port Name Direction Description
mem_ck Output CK clock
mem_ck_n Output CK clock (negative leg)
mem_a Output Address
mem_cke Output Clock enable
mem_cs_n Output Chip select
mem_odt Output On-die termination
mem_dm Output Write data mask
mem_dq Bidirectional Read/write data
mem_dqs Bidirectional Data strobe
mem_dqs_n Bidirectional Data strobe (negative leg)

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