External Memory Interfaces Intel® Arria® 10 FPGA IP User Guide

ID 683106
Date 5/10/2023
Document Table of Contents

3.6.1. I/O Aux Sharing

The I/O Aux contains a hard Nios-II processor and dedicated memory storing the calibration software code and data.

When a column contains multiple memory interfaces, the hard Nios-II processor calibrates each interface serially. Interfaces placed within the same I/O column always share the same I/O Aux. The Intel® Quartus® Prime Fitter handles I/O Aux sharing automatically.

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