Arria® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683213
Date 10/18/2023
Document Table of Contents Voltage-Referenced I/O Standards

To accommodate voltage-referenced I/O standards:

  • Each Arria V GX, GT, SX, or ST I/O bank contains a dedicated VREF pin.
  • Each Arria V GZ I/O bank supports multiple dedicated VREF pins feeding a common VREF bus.
  • Each bank can have only a single VCCIO voltage level and a single voltage reference (VREF) level.

An I/O bank featuring single-ended or differential standards can support different voltage-referenced standards if the VCCIO and VREF are the same levels.

For performance reasons, voltage-referenced input standards use their own VCCPD level as the power source. This feature allows you to place voltage-referenced input signals in an I/O bank with a VCCIO of 2.5 V or below. For example, you can place HSTL-15 input pins in an I/O bank with 2.5 V VCCIO. However, the voltage-referenced input with RT OCT enabled requires the VCCIO of the I/O bank to match the voltage of the input standard. RT OCT cannot be supported for the HSTL-15 I/O standard when VCCIO is 2.5 V.

Voltage-referenced bidirectional and output signals must be the same as the VCCIO voltage of the I/O bank. For example, you can place only SSTL-2 output pins in an I/O bank with a 2.5 V VCCIO.