Arria® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683213
Date 10/18/2023
Document Table of Contents 18-Bit Systolic FIR Mode

In 18-bit systolic FIR mode, the adders are configured as dual 44-bit adders, thereby giving 8 bits of overhead when using an 18-bit operation (36-bit products). This allows a total of 256 multiplier products.

Figure 59.  18-Bit Systolic FIR Mode for Arria V GX, GT, SX, and ST Devices

Figure 60.  18-Bit Systolic FIR Mode with Two Dynamic Inputs for Arria V GZ Devices