Arria V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683213
Date 7/24/2020
Document Table of Contents PCLK Control Block

To drive the HSSI horizontal PCLK control block, select the HSSI output or internal logic .

To drive the DPA vertical PCLK, select the DPA clock output or internal logic . You can only use the DPA clock output to generate the vertical PCLK to the core.

Figure 71. Horizontal PCLK Control Block for Arria V Devices

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