Arria® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683213
Date 10/18/2023
Document Table of Contents DQS Delay Chain

DQS delay chains consist of a set of variable delay elements to allow the input DQS/CQ /CQn/QK# signals to be shifted by the amount specified by the DQS phase-shift circuitry or the logic array.

There are two delay elements in the DQS delay chain that have the same characteristics:

  • Delay elements in the DQS logic block
  • Delay elements in the DLL

The DQS/CQ/CQn/QK# pin is shifted by the DQS delay settings.

The number of delay chains required is transparent because the UniPHY IP automatically sets it when you choose the operating frequency.

In Arria® V GX, GT, and GZ devices, if you do not use the DLL to control the DQS delay chains, you can input your own gray-coded 7 bit settings using the delayctrlin[6..0] signals available in the UniPHY IP.

In the Arria® V SX and ST devices, the DQS delay chain is controlled by the DQS phase-shift circuitry only.