Arria V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683213
Date 7/24/2020
Document Table of Contents

7.4.2. External Memory Interface Datapath

The following figures show overviews of the memory interface datapath that uses the Arria® V I/O elements. In the figures, the DQ/DQS read and write signals may be bidirectional or unidirectional, depending on the memory standard. If the signal is bidirectional, it is active during read and write operations.

Figure 159. External Memory Interface Datapath Overview for Arria V GX, GT, SX, and ST Devices

Figure 160. External Memory Interface Datapath Overview for Arria V GZ Devices

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